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  july 2009 doc id 11038 rev 3 1/26 1 VND830AEP-E double channel high side driver features dc short circuit current: 6a cmos compatible inputs proportional load current sense undervoltage and overvoltage shutdown overvoltage clamp thermal shutdown current limitation very low standby power dissipation protection against loss of ground and loss of v cc reverse battery protection (a) in compliance with the 2002/95/ec european directive description the VND830AEP-E is a monolithic device made using | stmicroelectronics vipower? m0-3 technology. the vnd830 aep-e is intended for driving any type of multiple load with one side connected to ground. the active v cc pin voltage clamp protects the device against low energy spikes (see iso7637 transient compatibility table). this device has two channels in high side configuration; each channel has an analog sense output on which the sensing current is proportional (according to a known ratio) to the corresponding load current. built-in thermal shutdown and outputs current limitation protect the chip from over temperature and short circuit. the device automatically turns off in the case where the ground pin becomes disconnected. type r ds(on) i out v cc VND830AEP-E 60m (1) 1. per each channel. 6a (1) 36v a. see application schematic on page 16 powersso-24 table 1. device summary package order codes tube tape and reel powersso-24 VND830AEP-E vnd830aeptr-e www.st.com
contents VND830AEP-E 2/26 doc id 11038 rev 3 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16 3.1.1 solution 1: a resistor in the ground line (rgnd only) . . . . . . . . . . . . . . 16 3.1.2 solution 2: a diode (d gnd ) in the ground line . . . . . . . . . . . . . . . . . . . . 17 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3 mcu i/o protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4 maximum demagnetization energy (v cc = 13.5v) . . . . . . . . . . . . . . . . . . 18 4 package and pc board thermal da ta . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.1 powersso-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.1 ecopack? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.2 powersso-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.3 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
VND830AEP-E list of tables doc id 11038 rev 3 3/26 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 5. power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 6. protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 7. v cc - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 8. switching (v cc = 13v; tj = 25c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 9. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 10. current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 11. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 12. electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 13. electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 14. electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 15. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 16. powersso-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 17. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
list of figures VND830AEP-E 4/26 doc id 11038 rev 3 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. iout/isense versus iout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 9. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 10. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 11. overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 12. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 13. ilim vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 14. on-state resistance vs vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 15. input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 16. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 17. on-state resistance vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 18. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 19. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 20. maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 21. powersso-24 pc board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 22. rthj-amb vs pcb copper area in open box free air condition (one channel on) . . . . . . . . 19 figure 23. powersso-24 thermal impedance junction ambient single pulse (one channel on). . . . . 20 figure 24. thermal fitting model of a double channel hsd in powersso-24 . . . . . . . . . . . . . . . . . . . 20 figure 25. powersso-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 26. powersso-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 27. powersso-24 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
VND830AEP-E block diagram and pin description doc id 11038 rev 3 5/26 1 block diagram and pin description figure 1. block diagram figure 2. configurati on diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin current sense n.c. output input floating x x x to ground through 1k resistor x through 10k resistor logic undervoltage overvoltage overtemp. 1 overtemp. 2 i lim2 pwclamp 2 k i out2 i lim1 pwclamp 1 k i out1 input 1 input 2 gnd v cc output 1 current sense 1 output 2 current sense 2 driver 2 driver 1 v cc clamp ot1 ot2 ot1 ot2 v dslim1 v dslim2 output2 output2 output2 output2 nc input1 gnd v cc nc input2 output2 output2 output1 output1 output1 output1 nc v cc c.sense1 nc nc c.sense2 output1 output1 tab = v cc
electrical specifications VND830AEP-E 6/26 doc id 11038 rev 3 2 electrical specifications 2.1 absolute maximum ratings stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality document. 2.2 thermal data table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 41 v - v cc reverse dc supply voltage - 0.3 v - i gnd dc reverse ground pin current - 200 ma i out dc output current internally limited a i r reverse dc output current - 6 a i in dc input current +/- 10 ma v csense current sense maximum voltage - 3 15 v v v esd electrostatic discharge (human body model:r=1.5k ; c=100pf) ? input ? current sense ? output ?v cc 4000 2000 5000 5000 v v v v e max maximum switching energy (l = 2.2mh; r l = 0 ; v bat = 13.5v; t jstart = 150c; i l = 10a) 153 mj p tot power dissipation (per island) at t lead = 25c 8.3 w t j junction operating temperature internally limited c t c case operating temperature - 40 to 150 c t stg storage temperature - 55 to 150 c table 4. thermal data (per island) symbol parameter max. value unit r thj-case thermal resistance junction-case 1.7 c/w r thj-amb thermal resistance junction-ambient (one chip on) 55 (1) 1. when mounted on a standard single-sided fr-4 board with 0.5cm 2 of cu (at least 35 m thick) connected to all vcc pins. horizontal mount ing and no artificial air flow. c/w
VND830AEP-E electrical specifications doc id 11038 rev 3 7/26 2.3 electrical characteristics values specified in this section are for 8v < v cc < 36v; -40c < t j < 150c, unless otherwise stated. figure 3. current and voltage conventions note: v fn = v ccn - v outn during reverse battery condition. i s i gnd output2 v cc i out2 v cc v sense2 current sense 1 i sense1 v out2 output1 i out1 current sense 2 i sense2 v sense1 v out1 input2 i in2 input1 i in1 v in2 v in1 ground v f1 (*) table 5. power output symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 5.5 13 36 v v usd undervoltage shutdown 3 4 5.5 v v ov overvoltage shutdown 36 v r on on-state resistance i out = 2a; t j = 25c i out = 2a; t j = 125c 60 120 m m v clamp clamp voltage i cc = 20ma 41 48 55 v i s supply current off-state; v cc = 13v; v in = v out = 0v off-state; v cc = 13v; v in = v out = 0v; t j = 25c on-state; v cc = 13v; v in = 5v; i out = 0a; r sense = 3.9k 12 12 40 25 7 a a ma i l(off1) off-state output current v in = v out = 0v; v cc = 36v; t j = 125c 050a i l(off3) off-state output current v in = v out = 0v; v cc = 13v; t j = 125c 5a i l(off4) off-state output current v in = v out = 0v; v cc = 13v; t j = 25c 3a
electrical specifications VND830AEP-E 8/26 doc id 11038 rev 3 note: to ensure long term reliability under heavy ov erload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. table 6. protections symbol parameter test conditions min. typ. max. unit i lim current limitation v cc = 13v 5.5v < v cc < 36v 61015 15 a a t tsd shutdown temperature 150 175 200 c t r reset temperature 135 c t hyst thermal hysteresis 7 15 c v demag turn-off output clamp voltage i out = 2a; v in = 0v; l = 6mh v cc - 41 v cc - 48 v cc - 55 v v on output voltage drop limitation i out = 10ma 50 mv table 7. v cc - output diode symbol parameter test conditions min. typ. max. unit v f forward on voltage - i out = 1.3a; t j = 150c 0.6 v table 8. switching (v cc = 13v; t j = 25c) symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time r l = 6.5 from v in rising edge to v out = 1.3v (see figure 5 ) 30 s t d(off) turn-off delay time r l = 6.5 from v in falling edge to v out = 11.7v (see figure 5 ) 30 s dv out /dt (on) turn-on voltage slope r l = 6.5 from v out = 1.3v to v out = 10.4v (see figure 5 ) see figure 10 v/s dv out /dt (off) turn-off voltage slope r l = 6.5 from v out = 11.7v to v out = 1.3v (see figure 5 ) see figure 12 v/s table 9. logic inputs symbol parameter test conditions min. typ. max. unit v il input low level 1.25 v i il low level input current v in = 1.25v 1 a v ih input high level 3.25 v i ih high level input current v in = 3.25v 10 a
VND830AEP-E electrical specifications doc id 11038 rev 3 9/26 v i(hyst) input hysteresis voltage 0.5 v v icl input clamp voltage i in = 1ma i in = -1ma 66.8 - 0.7 8v v table 10. current sense symbol parameter test conditions min. typ. max. unit k 0 i out /i sense i out1 or i out2 = 0.05a; v sense = 0.5v; other channels open; t j = -40c...150c 600 1300 2000 k 1 i out /i sense i out1 or i out2 = 0.25a; v sense = 0.5v; other channels open; t j = -40c...150c 1000 1400 1900 dk 1 /k 1 current sense ratio drift i out1 or i out2 = 0.25a; v sense = 0.5v; other channels open; t j = -40c...150c -10 +10 % k 2 i out /i sense i out1 or i out2 = 1.6a; v sense = 4v; other channels open; t j = -40c t j = 25c...150c 1280 1300 1500 1500 1800 1780 dk 2 /k 2 current sense ratio drift i out1 or i out2 = 1.6a; v sense = 4v; other channels open; t j = -40c...150c -6 +6 % k 3 i out /i sense i out1 or i out2 = 2.5a; v sense = 4v; other channels open; t j = -40c t j = 25c...150c 1280 1340 1500 1500 1680 1600 dk 3 /k 3 current sense ratio drift i out1 or i out2 = 2.5a; v sense = 4v; other channels open; t j = -40c...150c -6 +6 % i sense analog sense leakage current v in = 0v; i out = 0a; v sense = 0v; t j = -40c...150c v in = 5v; i out = 0a; v sense = 0v; t j = -40c...150c 0 0 5 10 a a v sense max. analog sense output voltage v cc = 5.5v; i out1,2 = 1.3a; r sense = 10k v cc > 8v, i out1,2 = 2.5a; r sense = 10k 2 4 v v v senseh sense voltage in over temperature conditions v cc = 13v; r sense = 3.9k 5.5 v table 9. logic inputs (continued) symbol parameter test conditions min. typ. max. unit
electrical specifications VND830AEP-E 10/26 doc id 11038 rev 3 figure 4. i out /i sense versus i out r vsenseh analog sense output impedance in over temperature condition v cc = 13v; t j > t tsd ; all channels open 400 t dsense current sense delay response to 9 0 % i sense (1) 500 s 1. current sense signal delay after positive input slope. table 10. current sense (continued) symbol parameter test conditions min. typ. max. unit 0 0.5 1 1.5 2 2.5 3 iout (a) 500 750 1000 1250 1500 1750 2000 2250 iout/isense typical value max tj= -40oc min tj= -40oc max tj=25...150oc min tj=25...150oc
VND830AEP-E electrical specifications doc id 11038 rev 3 11/26 figure 5. switching characteristics table 11. truth table conditions input output sense normal operation l h l h 0 nominal overtemperature l h l l 0 v senseh undervoltage l h l l 0 0 overvoltage l h l l 0 0 short circuit to gnd l h h l l l 0 (t j < t tsd ) 0 (t j > t tsd ) 0 short circuit to v cc l h h h 0 < nominal negative output voltage clamp l l 0 v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) i sense t t 90% t d(off) input t 90% t d(on) t dsense
electrical specifications VND830AEP-E 12/26 doc id 11038 rev 3 table 12. electrical transient requirements (part 1/3) iso t/r 7637/1 test pulse test level i ii iii iv delays and impedance 1 - 25v - 50v - 75v - 100v 2ms, 10 2 + 25v + 50v + 75v + 100v 0.2ms, 10 3a - 25v - 50v - 100v - 150v 0.1s, 50 3b + 25v + 50v + 75v + 100v 0.1s, 50 4 - 4v - 5v - 6v - 7v 100ms, 0.01 5 + 26.5v + 46.5v + 66.5v + 86.5v 400ms, 2 table 13. electrical transient requirements (part 2/3) iso t/r 7637/1 test pulse test level iiiiiiiv 1c c c c 2c c c c 3a c c c c 3b c c c c 4c c c c 5c e e e table 14. electrical transient requirements (part 3/3) class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device.
VND830AEP-E electrical specifications doc id 11038 rev 3 13/26 figure 6. waveforms sense n input n normal operation undervoltage v cc v usd v usdhyst input n overvoltage v cc sense n input n sense n load current n load current n load current n v ov v cc > v ov v cc < v ov short to ground input n load current n sense n load voltage n overtemperature input n sense n t tsd t r t j load current n input n load voltage n sense n load current n electrical specifications VND830AEP-E 14/26 doc id 11038 rev 3 2.4 electrical char acteristics curves figure 7. off-state output current figure 8. high level input current figure 9. input clamp voltage figure 10. turn-on voltage slope figure 11. overvoltage shutdown figure 12. turn-off voltage slope -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 il(off1) (ua) off state vcc=13v vin=vout=0v -50 -25 0 25 50 75 100 125 150 175 tc (o c ) 1 1.5 2 2.5 3 3.5 4 4.5 5 iih (ua) vin=3.25v -50 -25 0 25 50 75 100 125 150 175 tc (o c ) 6 6.2 6.4 6.6 6.8 7 7.2 7.4 7.6 7.8 8 vicl (v) iin=1ma -50 -25 0 25 50 75 100 125 150 175 tc ( c ) 100 200 300 400 500 600 700 800 900 dvout/dt(on) vcc=13v ri=6.5ohm -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 30 32.5 35 37.5 40 42.5 45 47.5 50 vov (v) -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 0 50 100 150 200 250 300 350 400 450 500 dvout/dt(off) (v/ms) vcc=13v rl=6.5ohm
VND830AEP-E electrical specifications doc id 11038 rev 3 15/26 figure 13. i lim vs t case figure 14. on-state resistance vs v cc figure 15. input high level figure 16. input hysteresis voltage figure 17. on-state resistance vs tcase figure 18. input low level -50 -25 0 25 50 75 100 125 150 175 tc ( c ) 0 2.5 5 7.5 10 12.5 15 17.5 20 ilim (a) vcc=13v 5 10152025303540 vcc (v) 20 30 40 50 60 70 80 90 100 ron (mohm) iout=5a tc=150oc tc=25oc tc= -40oc -50 -25 0 25 50 75 100 125 150 175 tc (o c ) 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 vih (v) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 vhyst (v) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 0 10 20 30 40 50 60 70 80 90 100 ron (mohm) iout=5a vcc=8v & 36v -50 -25 0 25 50 75 100 125 150 175 tc ( c ) 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 vil (v) vcc=13v
application information VND830AEP-E 16/26 doc id 11038 rev 3 3 application information figure 19. application schematic 3.1 gnd protection network against reverse battery this section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 solution 1: a resistor in the ground line (r gnd only) this can be used with any type of load. the following show how to dimension the r gnd resistor: 1. r gnd 600mv / 2 (i s(on)max ) 2. r gnd ( - v cc ) / (- i gnd ) where - i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc < 0 during reverse battery situations) is: p d = (- v cc ) 2 / r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that, if the microprocessor ground is not shared by the device ground, then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift will vary depending on how ma ny devices are on in the case of several high side drivers sharing the same r gnd . v cc gnd output2 current sense1 d ld +5v r prot r sense2 output1 r sense1 input1 d gnd r gnd v gnd current sense2 input2 c r prot r prot r prot
VND830AEP-E application information doc id 11038 rev 3 17/26 if the calculated power dissipation requires the use of a large resistor, or several devices have to share the same resistor, then st suggests using solution 2 below. 3.1.2 solution 2: a diode (d gnd ) in the ground line a resistor (r gnd = 1k ) should be inserted in parallel to d gnd if the device w ill be driving an inductive load. this small signal diode can be safely shared amongst several different hsd. also in this case, the presence of the groun d network will produce a shift (j600mv) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. this shift will not vary if more than one hsd shares the same diode/resistor network. series resistor in input and status lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. safest configuration for unused input and status pin is to leave them unconnected. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the v cc maximum dc rating. the same applies if the device is subject to transients on the v cc line that are greater than those shown in the iso t/r 7637/1 table. 3.3 mcu i/o protection if a ground protection network is used and negative transients are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the c i/o pins from latching up. the value of these resistors is a compromise between the leakage current of c and the current required by the hsd i/o s (input levels compatibility) with the latch-up limit of c i/os: - v ccpeak / i latchup r prot (v oh c - v ih - v gnd ) / i ihmax example for the following conditions: v ccpeak = - 100v i latchup 20ma v oh c 4.5v 5k r prot 65k . recommended values are: r prot = 10k
application information VND830AEP-E 18/26 doc id 11038 rev 3 3.4 maximum demagnetization energy (v cc = 13.5v) figure 20. maximum turn-off current versus load inductance note: values are generated with r l = 0 . in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves b and c. v in , i l t demagnetization demagnetization demagnetization a = single pulse at t jstart = 150oc b= repetitive pulse at t jstart = 100oc c= repetitive pulse at t jstart = 125oc 1 10 100 0.1 1 10 l(mh) i lmax (a) a b c
VND830AEP-E package and pc board thermal data doc id 11038 rev 3 19/26 4 package and pc board thermal data 4.1 powersso-24 thermal data figure 21. powersso-24 pc board note: layout condition of r th and z th measurements (pcb fr4 area= 78 mm x 78 mm, pcb thickness=2 mm, cu thickness=70 mm (front and back side), copper areas: from minimum pad lay-out to 8 cm 2 ). figure 22. r thj-amb vs pcb copper area in open box fr ee air condition (one channel on) 40 45 50 55 60 0123456789 rthj_amb(c/w) pcb cu heatsink area (cm^2)
package and pc board th ermal data VND830AEP-E 20/26 doc id 11038 rev 3 figure 23. powersso-24 thermal impedan ce junction ambient single pulse (one channel on) figure 24. thermal fitting model of a double channel hsd in powersso-24 (b) equation 1 : pulse calculation formula : where = t p /t b. the fitting model is a simplified thermal tool and is valid for trans ient evolutions where the embedded protections (power limitation or thermal cycling during ther mal shutdown) are not triggered. 0.1 1 10 100 0.0001 0.001 0.01 0.1 1 10 100 1000 time (s) zth (c/w) footprint 8 cm 2 z th r th z thtp 1 ? () + ? =
VND830AEP-E package and pc board thermal data doc id 11038 rev 3 21/26 table 15. thermal parameters area/island (cm 2 )footprint8 r1 = r7 (c/w) 0.1 r2 = r8 (c/w) 0.9 r3 (c/w) 1 r4 (c/w) 4 r5 (c/w) 13.5 r6 (c/w) 37 22 c1 = c7 (w.s/c) 0.0006 c2 = c8 (w.s/c) 0.0025 c3 (w.s/c) 0.025 c4 (w.s/c) 0.08 c5 (w.s/c) 0.7 c6 (w.s/c) 3 5
package and packing information VND830AEP-E 22/26 doc id 11038 rev 3 5 package and packing information 5.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 powersso-24 mechanical data figure 25. powersso-24 package dimensions
VND830AEP-E package and packing information doc id 11038 rev 3 23/26 table 16. powersso-24 mechanical data (1) (2) 1. no intrusion allowed inwards the leads. 2. flash or bleeds on exposed die pad shall not exceed 0.4 mm per side symbol millimeters min. typ. max. a 2.45 a2 2.15 2.35 a1 0 0.10 b0.33 0.51 c0.23 0.32 d (3) 3. ?d and e? do not include mold flash or protusions. mold flash or protusions shall not exceed 0.15 mm. 10.10 10.50 e (3) 7.40 7.60 e0.8 e3 8.8 f2.3 g 0.1 g1 0.06 h 10.1 10.5 h 0.4 k0 8 l0.55 0.85 o1.2 q0.8 s2.9 t3.65 u1 n 10o x4.1 4.7 y 6.5 4.9 (4) 4. variations for small window leadframe option. 7.1 5.5 (4)
package and packing information VND830AEP-E 24/26 doc id 11038 rev 3 5.3 packing information figure 26. powersso-24 tube shipment (no suffix) figure 27. powersso-24 tape and reel shipment (suffix ?tr?) a c b all dimensions are in mm. base q.ty 49 bulk q.ty 1225 tube length ( 0.5) 532 a 3.5 b 13.8 c ( 0.1) 0.6 base q.ty 1000 bulk q.ty 1000 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 24.4 n (min) 100 t (max) 30.4 reel dimensions tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 ( 0.1) 4 component spacing p 12 hole diameter d ( 0.05) 1.55 hole diameter d1 (min) 1.5 hole position f ( 0.1) 11.5 compartment depth k (max) 2.85 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed
VND830AEP-E revision history doc id 11038 rev 3 25/26 6 revision history table 17. document revision history date revision changes 04-feb-2005 1 initial release. 27-nov-2008 2 document reformatted and restructured. added list of contents, tables and figures. added ecopack? packages information. update powersso-24 mechanical data . 01-jul-2009 3 updated figure 16: powersso-24 mechanical data : ? deleted a (min) value ? changed a (max) value from 2.50 to 2.45 ? changed a2 (max) value from 2.40 to 2.35 ? updated k values ? changed l (min) value from 0.6 to 0.55 ? changed l (max) value from1 to 0.85
VND830AEP-E 26/26 doc id 11038 rev 3 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in military , air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2009 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com


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